Saito, H., "VCI Cache and timeout design for IP over ATM", ICCCN96.
This paper discusses VCI cache and timeout design for carrying IP packets over ATM. It evaluates the processor load and the cost of the processor caused by IP packet transmission with/without VC connection establishment and cost of bandwidth assigned to the VC connection. Explicit expressions of the processor cost, the processor load and the bandwidth cost are derived by the amount of cache, timeout, the number of sources and traffic characteristics. Numerical examples show the influence of such variables on the costs.